Please use this identifier to cite or link to this item: http://localhost/handle/Hannan/591169
Title: Space-Vector PWM With Common-Mode Voltage Elimination for Multiphase Drives
Authors: Óscar López;Jacobo Álvarez;Jano Malvar;Alejandro G. Yepes;Ana Vidal;Fernando Baneira;Diego Pérez-Estévez;Francisco D. Freijedo;Jesús Doval-Gandoy
subject: multiphase drive|space-vector pulse width modulation (PWM)|voltage source inverter (VSI)|Common-mode voltage elimination|field-programmable gate array (FPGA)
Year: 2016
Publisher: IEEE
Abstract: Switching common-mode voltage (CMV) generated by the pulse width modulation (PWM) of the inverter causes common-mode currents, which lead to motor bearing failures and electromagnetic interference problems in multiphase drives. Such switching CMV can be reduced by taking advantage of the switching states of multilevel multiphase inverters that produce zero CMV. Specific space-vector PWM (SVPWM) techniques with CMV elimination, which only use zero CMV states, have been proposed for three-level five-phase drives, and for open-end winding five-, six-, and seven-phase drives, but such methods cannot be extended to a higher number of levels or phases. This paper presents a general (for any number of levels and phases) SVPMW with CMV elimination. The proposed technique can be applied to most multilevel topologies, has low computational complexity and is suitable for low-cost hardware implementations. The new algorithm is implemented in a low-cost field-programmable gate array and it is successfully tested in the laboratory using a five-level five-phase motor drive.
URI: http://localhost/handle/Hannan/183858
http://localhost/handle/Hannan/591169
ISSN: 0885-8993
1941-0107
volume: 31
issue: 12
Appears in Collections:2016

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Title: Space-Vector PWM With Common-Mode Voltage Elimination for Multiphase Drives
Authors: Óscar López;Jacobo Álvarez;Jano Malvar;Alejandro G. Yepes;Ana Vidal;Fernando Baneira;Diego Pérez-Estévez;Francisco D. Freijedo;Jesús Doval-Gandoy
subject: multiphase drive|space-vector pulse width modulation (PWM)|voltage source inverter (VSI)|Common-mode voltage elimination|field-programmable gate array (FPGA)
Year: 2016
Publisher: IEEE
Abstract: Switching common-mode voltage (CMV) generated by the pulse width modulation (PWM) of the inverter causes common-mode currents, which lead to motor bearing failures and electromagnetic interference problems in multiphase drives. Such switching CMV can be reduced by taking advantage of the switching states of multilevel multiphase inverters that produce zero CMV. Specific space-vector PWM (SVPWM) techniques with CMV elimination, which only use zero CMV states, have been proposed for three-level five-phase drives, and for open-end winding five-, six-, and seven-phase drives, but such methods cannot be extended to a higher number of levels or phases. This paper presents a general (for any number of levels and phases) SVPMW with CMV elimination. The proposed technique can be applied to most multilevel topologies, has low computational complexity and is suitable for low-cost hardware implementations. The new algorithm is implemented in a low-cost field-programmable gate array and it is successfully tested in the laboratory using a five-level five-phase motor drive.
URI: http://localhost/handle/Hannan/183858
http://localhost/handle/Hannan/591169
ISSN: 0885-8993
1941-0107
volume: 31
issue: 12
Appears in Collections:2016

Files in This Item:
File Description SizeFormat 
7390099.pdf1.75 MBAdobe PDFThumbnail
Preview File
Title: Space-Vector PWM With Common-Mode Voltage Elimination for Multiphase Drives
Authors: Óscar López;Jacobo Álvarez;Jano Malvar;Alejandro G. Yepes;Ana Vidal;Fernando Baneira;Diego Pérez-Estévez;Francisco D. Freijedo;Jesús Doval-Gandoy
subject: multiphase drive|space-vector pulse width modulation (PWM)|voltage source inverter (VSI)|Common-mode voltage elimination|field-programmable gate array (FPGA)
Year: 2016
Publisher: IEEE
Abstract: Switching common-mode voltage (CMV) generated by the pulse width modulation (PWM) of the inverter causes common-mode currents, which lead to motor bearing failures and electromagnetic interference problems in multiphase drives. Such switching CMV can be reduced by taking advantage of the switching states of multilevel multiphase inverters that produce zero CMV. Specific space-vector PWM (SVPWM) techniques with CMV elimination, which only use zero CMV states, have been proposed for three-level five-phase drives, and for open-end winding five-, six-, and seven-phase drives, but such methods cannot be extended to a higher number of levels or phases. This paper presents a general (for any number of levels and phases) SVPMW with CMV elimination. The proposed technique can be applied to most multilevel topologies, has low computational complexity and is suitable for low-cost hardware implementations. The new algorithm is implemented in a low-cost field-programmable gate array and it is successfully tested in the laboratory using a five-level five-phase motor drive.
URI: http://localhost/handle/Hannan/183858
http://localhost/handle/Hannan/591169
ISSN: 0885-8993
1941-0107
volume: 31
issue: 12
Appears in Collections:2016

Files in This Item:
File Description SizeFormat 
7390099.pdf1.75 MBAdobe PDFThumbnail
Preview File