Modeling and Characterization of Coaxial Through-Silicon Via With Electrically Floating Inner Silicon

Abstract

In this paper, coaxial through-silicon via (C-TSV) is modeled and studied with the consideration of electrically floating inner silicon substrate. Nonlinear capacitances of the central via and the outer shielding shell are accurately captured by solving cylindrical Poisson equation. By employing symbolically defined device block, the nonlinear capacitances of the C-TSV with electrically floating inner silicon are combined into the equivalent circuit model, and their impacts on the electrical characteristics are examined.