Please use this identifier to cite or link to this item: http://localhost/handle/Hannan/147047
Title: Reliability Assessment of InAlN/GaN HFETs With Lifetime 8.9\times 10^{\mathrm {6}} h
Authors: Yuangang Wang;Yuanjie Lv;Xubo Song;Lei Chi;Jiayun Yin;Xingye Zhou;Yulong Fang;Xin Tan;Hongyu Guo;Hao Peng;Guodong Gu;Zhihong Feng;Shujun Cai
Year: 2017
Publisher: IEEE
Abstract: Based on the three-temperature 30 V DC stress tests, the reliability of InAlN/GaN heterostructure field-effect transistors (HFETs) on SiC substrate was assessed for the first time. Using a failure criterion defined as 20% reduction in zero-gate-voltage drain current (Idss), the activation energy was estimated to be 1.94 eV, and the median time to failure was estimated to be 8.9 &x00D7; 10<sup>6</sup> h at junction temperature of 150&x00B0;. Moreover, the high temperature material storage indicates that the lifetime of InAlN/GaN HFETs can be further prolonged by the optimization of device process, such as introducing LPCVD SiN or ALD Al<sub>2</sub>O<sub>3</sub> as gate dielectric layer.
URI: http://localhost/handle/Hannan/147047
volume: 38
issue: 5
More Information: 604,
606
Appears in Collections:2017

Files in This Item:
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7873255.pdf929.88 kBAdobe PDF
Title: Reliability Assessment of InAlN/GaN HFETs With Lifetime 8.9\times 10^{\mathrm {6}} h
Authors: Yuangang Wang;Yuanjie Lv;Xubo Song;Lei Chi;Jiayun Yin;Xingye Zhou;Yulong Fang;Xin Tan;Hongyu Guo;Hao Peng;Guodong Gu;Zhihong Feng;Shujun Cai
Year: 2017
Publisher: IEEE
Abstract: Based on the three-temperature 30 V DC stress tests, the reliability of InAlN/GaN heterostructure field-effect transistors (HFETs) on SiC substrate was assessed for the first time. Using a failure criterion defined as 20% reduction in zero-gate-voltage drain current (Idss), the activation energy was estimated to be 1.94 eV, and the median time to failure was estimated to be 8.9 &x00D7; 10<sup>6</sup> h at junction temperature of 150&x00B0;. Moreover, the high temperature material storage indicates that the lifetime of InAlN/GaN HFETs can be further prolonged by the optimization of device process, such as introducing LPCVD SiN or ALD Al<sub>2</sub>O<sub>3</sub> as gate dielectric layer.
URI: http://localhost/handle/Hannan/147047
volume: 38
issue: 5
More Information: 604,
606
Appears in Collections:2017

Files in This Item:
File SizeFormat 
7873255.pdf929.88 kBAdobe PDF
Title: Reliability Assessment of InAlN/GaN HFETs With Lifetime 8.9\times 10^{\mathrm {6}} h
Authors: Yuangang Wang;Yuanjie Lv;Xubo Song;Lei Chi;Jiayun Yin;Xingye Zhou;Yulong Fang;Xin Tan;Hongyu Guo;Hao Peng;Guodong Gu;Zhihong Feng;Shujun Cai
Year: 2017
Publisher: IEEE
Abstract: Based on the three-temperature 30 V DC stress tests, the reliability of InAlN/GaN heterostructure field-effect transistors (HFETs) on SiC substrate was assessed for the first time. Using a failure criterion defined as 20% reduction in zero-gate-voltage drain current (Idss), the activation energy was estimated to be 1.94 eV, and the median time to failure was estimated to be 8.9 &x00D7; 10<sup>6</sup> h at junction temperature of 150&x00B0;. Moreover, the high temperature material storage indicates that the lifetime of InAlN/GaN HFETs can be further prolonged by the optimization of device process, such as introducing LPCVD SiN or ALD Al<sub>2</sub>O<sub>3</sub> as gate dielectric layer.
URI: http://localhost/handle/Hannan/147047
volume: 38
issue: 5
More Information: 604,
606
Appears in Collections:2017

Files in This Item:
File SizeFormat 
7873255.pdf929.88 kBAdobe PDF