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مرور بر اساس تاریخ انتشار Sachdev, Manoj
مرتب سازی بر اساس
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Showing results 1 to 13 of 13
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Issue Date
Title
Contributor(s)
2008
32-b ALU in 180-nm CMOS Technology
Chatterjee, Bhaskar
;
Sachdev, Manoj
2008
A comparative analysis of low-power low-voltage dual-edge-triggered flip-flops
Chung, Wai
;
Lo, Timothy
;
Sachdev, Manoj
2009
Design and analysis of A 5.3-pJ 64-kb gated ground SRAM with multiword ECC
Jahinuzzaman, Shah M.
;
Shah, Jaspal Singh
;
Rennie, David J.
;
Sachdev, Manoj
2008
DFT for testing high-performance pipelined circuits with slow-speed testers
Nummer, Muhammad
;
Sachdev, Manoj
2008
Effect of CMOS technology scaling on thermal management during burn-in
Semenov, Oleg
;
Vassighi, Arman
;
Sachdev, Manoj
;
Keshavarzi, Ali
;
Hawkins, C. F.
2009
An Energy Efficient 40 Kb SRAM Module With Extended Read / Write Noise Margin in
Sharifkhani, Mohammad
;
Sachdev, Manoj
2013
An Energy-Efficient Offset-Cancelling
Shah, Jaspal Singh
;
Nairn, David
;
Sachdev, Manoj
2009
Low-Leakage Storage Cells for Ternary Content
Mohan, Nitin
;
Sachdev, Manoj
2013
A New SEC-DED Error Correction Code Subclass for Adjacent MBU Tolerance in Embedded Memory
Neale, Adam
;
Sachdev, Manoj
2011
Novel soft error robust flip-flops in 65nm CMOS
Rennie, David J.
;
Sachdev, Manoj
2008
Segmented virtual ground architecture for low-power embedded SRAM
Sharifkhani, Mohammad
;
Sachdev, Manoj
2008
Variation-aware adaptive voltage scaling system
Elgebaly, Mohamed
;
Sachdev, Manoj
2008
Weak Cell Detection in Deep-Submicron SRAMs : A Programmable Detection Technique
Pavlov, Andrei
;
Sachdev, Manoj