Please use this identifier to cite or link to this item: http://localhost/handle/Hannan/660550
Title: EMBIRA: An Accelerator for Model-Based Iterative Reconstruction
Authors: Junshi Liu;Swagath Venkataramani;Singanallur V. Venkatakrishnan;Yun Pan;Charles A. Bouman;Anand Raghunathan
subject: 3-D tomographic reconstruction|hardware accelerator|energy efficiency|model-based iterative reconstruction (MBIR)
Year: 2016
Publisher: IEEE
Abstract: Tomographic reconstruction, which involves computing a 3-D volume from its 2-D projections, is an important problem in imaging with wide-ranging applications, including medical scanners, electron microscopy, nondestructive testing, and transportation security. Model-based iterative reconstruction (MBIR) is a popular approach to 3-D reconstruction that has demonstrated the state-of-the-art reconstruction quality on several applications, and has been deployed in commercial healthcare systems. However, software implementations of MBIR on commodity general-purpose processors demonstrate poor performance due to its high compute and data requirements and cache unfriendly data access patterns. In this paper, we develop an efficient MBIR accelerator (EMBIRA) that achieves significant performance and energy improvement over software implementations. EMBIRA utilizes arrays of three types of specialized processing elements that match MBIR's computation patterns, and is further operated as a two-level nested pipeline to fully exploit the parallelism present in the algorithm. Another important source from which EMBIRA derives its efficiency is by constraining the sequence in which voxels1 in the 3-D volume are reconstructed. This enables better data reuse within the accelerator, thereby significantly reducing the number of off-chip memory accesses. To demonstrate the benefits of EMBIRA, we implemented a prototype on an Altera DE5 field-programmable gate array (FPGA) platform that includes an Altera Stratix V GX FPGA and DDR3 memory. Our implementation of EMBIRA, operating at 165 MHz, achieved 51.8× (5.8×) improvement in performance, and 355× (199×) improvement in energy, compared with optimized sequential (multithreaded) software implementations on a 48-core 2.3-GHz AMD Opteron-based server.
URI: http://localhost/handle/Hannan/170951
http://localhost/handle/Hannan/660550
ISSN: 1063-8210
1557-9999
volume: 24
issue: 11
Appears in Collections:2016

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Title: EMBIRA: An Accelerator for Model-Based Iterative Reconstruction
Authors: Junshi Liu;Swagath Venkataramani;Singanallur V. Venkatakrishnan;Yun Pan;Charles A. Bouman;Anand Raghunathan
subject: 3-D tomographic reconstruction|hardware accelerator|energy efficiency|model-based iterative reconstruction (MBIR)
Year: 2016
Publisher: IEEE
Abstract: Tomographic reconstruction, which involves computing a 3-D volume from its 2-D projections, is an important problem in imaging with wide-ranging applications, including medical scanners, electron microscopy, nondestructive testing, and transportation security. Model-based iterative reconstruction (MBIR) is a popular approach to 3-D reconstruction that has demonstrated the state-of-the-art reconstruction quality on several applications, and has been deployed in commercial healthcare systems. However, software implementations of MBIR on commodity general-purpose processors demonstrate poor performance due to its high compute and data requirements and cache unfriendly data access patterns. In this paper, we develop an efficient MBIR accelerator (EMBIRA) that achieves significant performance and energy improvement over software implementations. EMBIRA utilizes arrays of three types of specialized processing elements that match MBIR's computation patterns, and is further operated as a two-level nested pipeline to fully exploit the parallelism present in the algorithm. Another important source from which EMBIRA derives its efficiency is by constraining the sequence in which voxels1 in the 3-D volume are reconstructed. This enables better data reuse within the accelerator, thereby significantly reducing the number of off-chip memory accesses. To demonstrate the benefits of EMBIRA, we implemented a prototype on an Altera DE5 field-programmable gate array (FPGA) platform that includes an Altera Stratix V GX FPGA and DDR3 memory. Our implementation of EMBIRA, operating at 165 MHz, achieved 51.8× (5.8×) improvement in performance, and 355× (199×) improvement in energy, compared with optimized sequential (multithreaded) software implementations on a 48-core 2.3-GHz AMD Opteron-based server.
URI: http://localhost/handle/Hannan/170951
http://localhost/handle/Hannan/660550
ISSN: 1063-8210
1557-9999
volume: 24
issue: 11
Appears in Collections:2016

Files in This Item:
File Description SizeFormat 
7463037.pdf6.38 MBAdobe PDFThumbnail
Preview File
Title: EMBIRA: An Accelerator for Model-Based Iterative Reconstruction
Authors: Junshi Liu;Swagath Venkataramani;Singanallur V. Venkatakrishnan;Yun Pan;Charles A. Bouman;Anand Raghunathan
subject: 3-D tomographic reconstruction|hardware accelerator|energy efficiency|model-based iterative reconstruction (MBIR)
Year: 2016
Publisher: IEEE
Abstract: Tomographic reconstruction, which involves computing a 3-D volume from its 2-D projections, is an important problem in imaging with wide-ranging applications, including medical scanners, electron microscopy, nondestructive testing, and transportation security. Model-based iterative reconstruction (MBIR) is a popular approach to 3-D reconstruction that has demonstrated the state-of-the-art reconstruction quality on several applications, and has been deployed in commercial healthcare systems. However, software implementations of MBIR on commodity general-purpose processors demonstrate poor performance due to its high compute and data requirements and cache unfriendly data access patterns. In this paper, we develop an efficient MBIR accelerator (EMBIRA) that achieves significant performance and energy improvement over software implementations. EMBIRA utilizes arrays of three types of specialized processing elements that match MBIR's computation patterns, and is further operated as a two-level nested pipeline to fully exploit the parallelism present in the algorithm. Another important source from which EMBIRA derives its efficiency is by constraining the sequence in which voxels1 in the 3-D volume are reconstructed. This enables better data reuse within the accelerator, thereby significantly reducing the number of off-chip memory accesses. To demonstrate the benefits of EMBIRA, we implemented a prototype on an Altera DE5 field-programmable gate array (FPGA) platform that includes an Altera Stratix V GX FPGA and DDR3 memory. Our implementation of EMBIRA, operating at 165 MHz, achieved 51.8× (5.8×) improvement in performance, and 355× (199×) improvement in energy, compared with optimized sequential (multithreaded) software implementations on a 48-core 2.3-GHz AMD Opteron-based server.
URI: http://localhost/handle/Hannan/170951
http://localhost/handle/Hannan/660550
ISSN: 1063-8210
1557-9999
volume: 24
issue: 11
Appears in Collections:2016

Files in This Item:
File Description SizeFormat 
7463037.pdf6.38 MBAdobe PDFThumbnail
Preview File