Please use this identifier to cite or link to this item: http://localhost/handle/Hannan/568033
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dc.contributor.authorXiaoming Chen ; Ling Ren ; Yu Wang ; Huazhong Yangen_US
dc.date.accessioned2020-05-20T07:52:27Z-
dc.date.available2020-05-20T07:52:27Z-
dc.date.issued2015en_US
dc.identifier.issn1045-9219en_US
dc.identifier.other10.1109/TPDS.2014.2312199en_US
dc.identifier.urihttp://localhost/handle/Hannan/229994en_US
dc.identifier.urihttp://localhost/handle/Hannan/568033-
dc.languageEnglishen_US
dc.publisherieeeen_US
dc.relation.haspart6774937.pdfen_US
dc.subjectSPICE; circuit simulation; graphics processing units; parallel programming; GPU-accelerated sparse Lu factorization; GPU-based sparse solver; NVIDIA GTX580 GPU; SPICE-based circuit simulators; graphics processing unit; hybrid parallel Lu factorization approach; massive thread-level parallelism; memory bandwidth; performance modeling; sequential PARDISO; simulation program with integrated circuit emphasis; sixteen-threaded PARDISO; Bandwidth; Graphics processing units; Instruction sets; Integrated circuit modeling; Parallel processing; Sparse matrices; Virtual groups; Graphics processing unit; circuit simulation; parallel sparse LU factorization; performance model;en_US
dc.titleSignal Processing Letters, IEEEen_US
dc.typeArticleen_US
dc.journal.volume26en_US
dc.journal.issue3en_US
dc.journal.titleParallel and Distributed Systems, IEEE Transactions onen_US
Appears in Collections:2015

Files in This Item:
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6774937.pdf1.96 MBAdobe PDF
Full metadata record
DC FieldValueLanguage
dc.contributor.authorXiaoming Chen ; Ling Ren ; Yu Wang ; Huazhong Yangen_US
dc.date.accessioned2020-05-20T07:52:27Z-
dc.date.available2020-05-20T07:52:27Z-
dc.date.issued2015en_US
dc.identifier.issn1045-9219en_US
dc.identifier.other10.1109/TPDS.2014.2312199en_US
dc.identifier.urihttp://localhost/handle/Hannan/229994en_US
dc.identifier.urihttp://localhost/handle/Hannan/568033-
dc.languageEnglishen_US
dc.publisherieeeen_US
dc.relation.haspart6774937.pdfen_US
dc.subjectSPICE; circuit simulation; graphics processing units; parallel programming; GPU-accelerated sparse Lu factorization; GPU-based sparse solver; NVIDIA GTX580 GPU; SPICE-based circuit simulators; graphics processing unit; hybrid parallel Lu factorization approach; massive thread-level parallelism; memory bandwidth; performance modeling; sequential PARDISO; simulation program with integrated circuit emphasis; sixteen-threaded PARDISO; Bandwidth; Graphics processing units; Instruction sets; Integrated circuit modeling; Parallel processing; Sparse matrices; Virtual groups; Graphics processing unit; circuit simulation; parallel sparse LU factorization; performance model;en_US
dc.titleSignal Processing Letters, IEEEen_US
dc.typeArticleen_US
dc.journal.volume26en_US
dc.journal.issue3en_US
dc.journal.titleParallel and Distributed Systems, IEEE Transactions onen_US
Appears in Collections:2015

Files in This Item:
File SizeFormat 
6774937.pdf1.96 MBAdobe PDF
Full metadata record
DC FieldValueLanguage
dc.contributor.authorXiaoming Chen ; Ling Ren ; Yu Wang ; Huazhong Yangen_US
dc.date.accessioned2020-05-20T07:52:27Z-
dc.date.available2020-05-20T07:52:27Z-
dc.date.issued2015en_US
dc.identifier.issn1045-9219en_US
dc.identifier.other10.1109/TPDS.2014.2312199en_US
dc.identifier.urihttp://localhost/handle/Hannan/229994en_US
dc.identifier.urihttp://localhost/handle/Hannan/568033-
dc.languageEnglishen_US
dc.publisherieeeen_US
dc.relation.haspart6774937.pdfen_US
dc.subjectSPICE; circuit simulation; graphics processing units; parallel programming; GPU-accelerated sparse Lu factorization; GPU-based sparse solver; NVIDIA GTX580 GPU; SPICE-based circuit simulators; graphics processing unit; hybrid parallel Lu factorization approach; massive thread-level parallelism; memory bandwidth; performance modeling; sequential PARDISO; simulation program with integrated circuit emphasis; sixteen-threaded PARDISO; Bandwidth; Graphics processing units; Instruction sets; Integrated circuit modeling; Parallel processing; Sparse matrices; Virtual groups; Graphics processing unit; circuit simulation; parallel sparse LU factorization; performance model;en_US
dc.titleSignal Processing Letters, IEEEen_US
dc.typeArticleen_US
dc.journal.volume26en_US
dc.journal.issue3en_US
dc.journal.titleParallel and Distributed Systems, IEEE Transactions onen_US
Appears in Collections:2015

Files in This Item:
File SizeFormat 
6774937.pdf1.96 MBAdobe PDF