Please use this identifier to cite or link to this item: http://localhost/handle/Hannan/568030
Title: Signal Processing Letters, IEEE
Authors: Vezyrtzis, Christos ; Tsividis, Yannis ; Nowick, Steven M.
subject: CMOS digital integrated circuits; delay lines; low-power electronics; signal processing; CMOS technology; adaptive granularity; calibrated delay line; continuous-time digital signal processors; digital controller; energy efficiency; fine-grain mode; lightweight asynchronous control blocks; micropipeline; pipelined delay lines; reconfigurable delay lines; size 0.13 mum; Delay lines; Delays; Digital signal processing; Monitoring; Protocols; Real-time systems; Asynchronous systems; delay line; digital design; digital signal processor (DSP); digital signal processor (DSP).;
Year: 2015
Publisher: ieee
Description: Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
URI: http://localhost/handle/Hannan/230002
http://localhost/handle/Hannan/568030
ISSN: 1063-8210
volume: 23
issue: 10
Appears in Collections:2015

Files in This Item:
File SizeFormat 
6922591.pdf4.49 MBAdobe PDF
Title: Signal Processing Letters, IEEE
Authors: Vezyrtzis, Christos ; Tsividis, Yannis ; Nowick, Steven M.
subject: CMOS digital integrated circuits; delay lines; low-power electronics; signal processing; CMOS technology; adaptive granularity; calibrated delay line; continuous-time digital signal processors; digital controller; energy efficiency; fine-grain mode; lightweight asynchronous control blocks; micropipeline; pipelined delay lines; reconfigurable delay lines; size 0.13 mum; Delay lines; Delays; Digital signal processing; Monitoring; Protocols; Real-time systems; Asynchronous systems; delay line; digital design; digital signal processor (DSP); digital signal processor (DSP).;
Year: 2015
Publisher: ieee
Description: Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
URI: http://localhost/handle/Hannan/230002
http://localhost/handle/Hannan/568030
ISSN: 1063-8210
volume: 23
issue: 10
Appears in Collections:2015

Files in This Item:
File SizeFormat 
6922591.pdf4.49 MBAdobe PDF
Title: Signal Processing Letters, IEEE
Authors: Vezyrtzis, Christos ; Tsividis, Yannis ; Nowick, Steven M.
subject: CMOS digital integrated circuits; delay lines; low-power electronics; signal processing; CMOS technology; adaptive granularity; calibrated delay line; continuous-time digital signal processors; digital controller; energy efficiency; fine-grain mode; lightweight asynchronous control blocks; micropipeline; pipelined delay lines; reconfigurable delay lines; size 0.13 mum; Delay lines; Delays; Digital signal processing; Monitoring; Protocols; Real-time systems; Asynchronous systems; delay line; digital design; digital signal processor (DSP); digital signal processor (DSP).;
Year: 2015
Publisher: ieee
Description: Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
URI: http://localhost/handle/Hannan/230002
http://localhost/handle/Hannan/568030
ISSN: 1063-8210
volume: 23
issue: 10
Appears in Collections:2015

Files in This Item:
File SizeFormat 
6922591.pdf4.49 MBAdobe PDF