Please use this identifier to cite or link to this item: http://localhost/handle/Hannan/527444
Title: Peripheral Adaption Power Cell Network for High Efficiency and High Linearity Power Amplifier
Authors: Nat. ASIC Syst. Eng. Res. Center, Southeast Univ., Nanjing, China;Xiaohong Sun ; Huai Gao ; Li, G.P. ; Weifeng Sun
subject: III-V semiconductors; UHF bipolar transistors; UHF power amplifiers; gallium arsenide; heterojunction bipolar transistors; GaAs; HBT process; IMD3; distributed input matching circuit; efficiency 48 percent; frequency 2.4 GHz; high efficiency power amplifier; high linearity power amplifier; peripheral adaption power cell network; pre-determined emitter ballast resistor; size 2 mum; smart power cell network design; Electrical ballasts; Heterojunction bipolar transistors; Intermodulation distortion; Power amplifiers; Power generation; Resistors; Ballast resistors; power added efficiency (PAE); power cell; third-order intermodulation distortion (IMD3);
Year: 2014
Publisher: IEEE
Abstract: This letter presents a smart power cell network design with peripheral adaption technique in a 2 μm GaAs HBT process. A distributed input matching circuit accompanying individual power cells, each with its own pre-determined emitter ballast resistor is used in power cell network to perform power adaption operation. The power cell network is optimized to further enhance efficiency especially at very low output power range with substantial linearity improvement over an entire output power range. Compared to traditional power cells used in power amplifier, the new design shows an increase of PAE by at least 5% and improvement of IMD3 by 10 dB at 2.4 GHz with 600 KHz frequency spacing in measurement. The fabricated PA achieves a saturated output power of 32 dBm with PAE of 48%, and its IMD3 is lower than -30 dB up to 30 dBm output power.
URI: http://localhost/handle/Hannan/241369
http://localhost/handle/Hannan/527444
ISSN: 1531-1309
volume: 24
issue: 11
Appears in Collections:2014

Files in This Item:
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6729109.pdf805.96 kBAdobe PDF
Title: Peripheral Adaption Power Cell Network for High Efficiency and High Linearity Power Amplifier
Authors: Nat. ASIC Syst. Eng. Res. Center, Southeast Univ., Nanjing, China;Xiaohong Sun ; Huai Gao ; Li, G.P. ; Weifeng Sun
subject: III-V semiconductors; UHF bipolar transistors; UHF power amplifiers; gallium arsenide; heterojunction bipolar transistors; GaAs; HBT process; IMD3; distributed input matching circuit; efficiency 48 percent; frequency 2.4 GHz; high efficiency power amplifier; high linearity power amplifier; peripheral adaption power cell network; pre-determined emitter ballast resistor; size 2 mum; smart power cell network design; Electrical ballasts; Heterojunction bipolar transistors; Intermodulation distortion; Power amplifiers; Power generation; Resistors; Ballast resistors; power added efficiency (PAE); power cell; third-order intermodulation distortion (IMD3);
Year: 2014
Publisher: IEEE
Abstract: This letter presents a smart power cell network design with peripheral adaption technique in a 2 μm GaAs HBT process. A distributed input matching circuit accompanying individual power cells, each with its own pre-determined emitter ballast resistor is used in power cell network to perform power adaption operation. The power cell network is optimized to further enhance efficiency especially at very low output power range with substantial linearity improvement over an entire output power range. Compared to traditional power cells used in power amplifier, the new design shows an increase of PAE by at least 5% and improvement of IMD3 by 10 dB at 2.4 GHz with 600 KHz frequency spacing in measurement. The fabricated PA achieves a saturated output power of 32 dBm with PAE of 48%, and its IMD3 is lower than -30 dB up to 30 dBm output power.
URI: http://localhost/handle/Hannan/241369
http://localhost/handle/Hannan/527444
ISSN: 1531-1309
volume: 24
issue: 11
Appears in Collections:2014

Files in This Item:
File SizeFormat 
6729109.pdf805.96 kBAdobe PDF
Title: Peripheral Adaption Power Cell Network for High Efficiency and High Linearity Power Amplifier
Authors: Nat. ASIC Syst. Eng. Res. Center, Southeast Univ., Nanjing, China;Xiaohong Sun ; Huai Gao ; Li, G.P. ; Weifeng Sun
subject: III-V semiconductors; UHF bipolar transistors; UHF power amplifiers; gallium arsenide; heterojunction bipolar transistors; GaAs; HBT process; IMD3; distributed input matching circuit; efficiency 48 percent; frequency 2.4 GHz; high efficiency power amplifier; high linearity power amplifier; peripheral adaption power cell network; pre-determined emitter ballast resistor; size 2 mum; smart power cell network design; Electrical ballasts; Heterojunction bipolar transistors; Intermodulation distortion; Power amplifiers; Power generation; Resistors; Ballast resistors; power added efficiency (PAE); power cell; third-order intermodulation distortion (IMD3);
Year: 2014
Publisher: IEEE
Abstract: This letter presents a smart power cell network design with peripheral adaption technique in a 2 μm GaAs HBT process. A distributed input matching circuit accompanying individual power cells, each with its own pre-determined emitter ballast resistor is used in power cell network to perform power adaption operation. The power cell network is optimized to further enhance efficiency especially at very low output power range with substantial linearity improvement over an entire output power range. Compared to traditional power cells used in power amplifier, the new design shows an increase of PAE by at least 5% and improvement of IMD3 by 10 dB at 2.4 GHz with 600 KHz frequency spacing in measurement. The fabricated PA achieves a saturated output power of 32 dBm with PAE of 48%, and its IMD3 is lower than -30 dB up to 30 dBm output power.
URI: http://localhost/handle/Hannan/241369
http://localhost/handle/Hannan/527444
ISSN: 1531-1309
volume: 24
issue: 11
Appears in Collections:2014

Files in This Item:
File SizeFormat 
6729109.pdf805.96 kBAdobe PDF