Please use this identifier to cite or link to this item: http://dlib.scu.ac.ir/handle/Hannan/524947
Title: Design Techniques for a 60-Gb/s 288-mW NRZ Transceiver With Adaptive Equalization and Baud-Rate Clock and Data Recovery in 65-nm CMOS Technology
Authors: Jaeduk Han;Nicholas Sutardja;Yue Lu;Elad Alon
Year: 2017
Publisher: IEEE
Abstract: Design techniques for a complete 60-Gb/s non-return-to-zero transceiver with adaptive equalization as well as baud-rate clock and data recovery (CDR) are demonstrated. A complete equalization front end with per-path adaptation and per-sampler offset calibration enables 60-Gb/s operation over realistic channels. Current integration in the front end for energy-efficient equalization is combined with integration phase dithering to realize a robust baud-rate CDR. Correlation of the adaptive error sampler output with the phase dithering sequence indicates the direction of phase offset, and the resulting baud-rate CDR saves power and complexity compared to an oversampling CDR by not requiring additional clock phases/deserializers. The proposed 65-nm CMOS transceiver operates at 60 Gb/s with an eye opening of 30% UI and consumes 288 mW while equalizing 21 dB of loss at 30 GHz over a 0.7-m Twinax cable.
URI: http://dl.kums.ac.ir/handle/Hannan/524947
volume: 52
issue: 12
More Information: 3474,
3485
Appears in Collections:2017

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Title: Design Techniques for a 60-Gb/s 288-mW NRZ Transceiver With Adaptive Equalization and Baud-Rate Clock and Data Recovery in 65-nm CMOS Technology
Authors: Jaeduk Han;Nicholas Sutardja;Yue Lu;Elad Alon
Year: 2017
Publisher: IEEE
Abstract: Design techniques for a complete 60-Gb/s non-return-to-zero transceiver with adaptive equalization as well as baud-rate clock and data recovery (CDR) are demonstrated. A complete equalization front end with per-path adaptation and per-sampler offset calibration enables 60-Gb/s operation over realistic channels. Current integration in the front end for energy-efficient equalization is combined with integration phase dithering to realize a robust baud-rate CDR. Correlation of the adaptive error sampler output with the phase dithering sequence indicates the direction of phase offset, and the resulting baud-rate CDR saves power and complexity compared to an oversampling CDR by not requiring additional clock phases/deserializers. The proposed 65-nm CMOS transceiver operates at 60 Gb/s with an eye opening of 30% UI and consumes 288 mW while equalizing 21 dB of loss at 30 GHz over a 0.7-m Twinax cable.
URI: http://dl.kums.ac.ir/handle/Hannan/524947
volume: 52
issue: 12
More Information: 3474,
3485
Appears in Collections:2017

Files in This Item:
File Description SizeFormat 
8025518.pdf6.21 MBAdobe PDFThumbnail
Preview File
Title: Design Techniques for a 60-Gb/s 288-mW NRZ Transceiver With Adaptive Equalization and Baud-Rate Clock and Data Recovery in 65-nm CMOS Technology
Authors: Jaeduk Han;Nicholas Sutardja;Yue Lu;Elad Alon
Year: 2017
Publisher: IEEE
Abstract: Design techniques for a complete 60-Gb/s non-return-to-zero transceiver with adaptive equalization as well as baud-rate clock and data recovery (CDR) are demonstrated. A complete equalization front end with per-path adaptation and per-sampler offset calibration enables 60-Gb/s operation over realistic channels. Current integration in the front end for energy-efficient equalization is combined with integration phase dithering to realize a robust baud-rate CDR. Correlation of the adaptive error sampler output with the phase dithering sequence indicates the direction of phase offset, and the resulting baud-rate CDR saves power and complexity compared to an oversampling CDR by not requiring additional clock phases/deserializers. The proposed 65-nm CMOS transceiver operates at 60 Gb/s with an eye opening of 30% UI and consumes 288 mW while equalizing 21 dB of loss at 30 GHz over a 0.7-m Twinax cable.
URI: http://dl.kums.ac.ir/handle/Hannan/524947
volume: 52
issue: 12
More Information: 3474,
3485
Appears in Collections:2017

Files in This Item:
File Description SizeFormat 
8025518.pdf6.21 MBAdobe PDFThumbnail
Preview File