Please use this identifier to cite or link to this item: http://localhost/handle/Hannan/248122
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dc.contributor.authorJie Guen_US
dc.date.accessioned2013en_US
dc.date.accessioned2020-04-06T10:20:59Z-
dc.date.available2020-04-06T10:20:59Z-
dc.date.issued2008en_US
dc.identifier.urihttp://localhost/handle/Hannan/248122-
dc.description.abstractPower consumption and process variations are two major issues for the VLSIcircuits with sub-100nm technologies. The soaring of power consumption makespower integrity especially challenging for designers while process variation bringsen_US
dc.relation.haspartTL75578.pdfen_US
dc.titleTechniques for Efficient On-chip Power Delivery and Accurate Leakage Modeling in Nanoscale CMOSen_US
dc.typeThesisen_US
Appears in Collections:Thesis

Files in This Item:
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TL75578.pdf10.65 MBAdobe PDF
Full metadata record
DC FieldValueLanguage
dc.contributor.authorJie Guen_US
dc.date.accessioned2013en_US
dc.date.accessioned2020-04-06T10:20:59Z-
dc.date.available2020-04-06T10:20:59Z-
dc.date.issued2008en_US
dc.identifier.urihttp://localhost/handle/Hannan/248122-
dc.description.abstractPower consumption and process variations are two major issues for the VLSIcircuits with sub-100nm technologies. The soaring of power consumption makespower integrity especially challenging for designers while process variation bringsen_US
dc.relation.haspartTL75578.pdfen_US
dc.titleTechniques for Efficient On-chip Power Delivery and Accurate Leakage Modeling in Nanoscale CMOSen_US
dc.typeThesisen_US
Appears in Collections:Thesis

Files in This Item:
File SizeFormat 
TL75578.pdf10.65 MBAdobe PDF
Full metadata record
DC FieldValueLanguage
dc.contributor.authorJie Guen_US
dc.date.accessioned2013en_US
dc.date.accessioned2020-04-06T10:20:59Z-
dc.date.available2020-04-06T10:20:59Z-
dc.date.issued2008en_US
dc.identifier.urihttp://localhost/handle/Hannan/248122-
dc.description.abstractPower consumption and process variations are two major issues for the VLSIcircuits with sub-100nm technologies. The soaring of power consumption makespower integrity especially challenging for designers while process variation bringsen_US
dc.relation.haspartTL75578.pdfen_US
dc.titleTechniques for Efficient On-chip Power Delivery and Accurate Leakage Modeling in Nanoscale CMOSen_US
dc.typeThesisen_US
Appears in Collections:Thesis

Files in This Item:
File SizeFormat 
TL75578.pdf10.65 MBAdobe PDF