Please use this identifier to cite or link to this item: http://localhost/handle/Hannan/206397
Title: A Compact High-Performance Programmable-Gain Analog Front End for HomePlug AV2 Communication in 0.18- \mu \text{m} CMOS
Authors: Zhangming Zhu;Jingyu Wang
Year: 2017
Publisher: IEEE
Abstract: An analog front end suitable for powerline communication HomePlug AV2 is firstly presented. Targeting different input power level, an attenuation-programmable gain amplifier (AT-PGA) and a low-noise amplifier are adopted as the input stage of receiver, respectively, followed by a fourth-order low-pass filter and a PGA with a build-in feedback control to improve linearity and stay constant bandwidth. A line driver with programmability in transmitter is designed to synthesize output impedance for maximizing the power density transmission ratio in power lines characterized by an impedance of 50 &x03A9;. The analog front end is realized in 0.18-&x03BC;m 3.3-V CMOS technology with power consumption of 160 mW (receiver) and 350 mW (transmitter) that occupies a 5.75-mm<sup>2</sup> die area (dual channel). The receiver exhibits a bandwidth of 100 MHz and a gain range from -26.2 to 21 dB, with a minimum noise figure of 20.2 dB at maximum gain 21 dB and maximum IIP3 of 36.1 dBm at minimum gain -26.2 dB. The transmitter achieves 47-dB lowband multi-tone power ratios (MTPR) and 9.6-dB high-band MTPR.
URI: http://localhost/handle/Hannan/206397
volume: 64
issue: 11
More Information: 2858,
2870
Appears in Collections:2017

Files in This Item:
File SizeFormat 
7938719.pdf2.38 MBAdobe PDF
Title: A Compact High-Performance Programmable-Gain Analog Front End for HomePlug AV2 Communication in 0.18- \mu \text{m} CMOS
Authors: Zhangming Zhu;Jingyu Wang
Year: 2017
Publisher: IEEE
Abstract: An analog front end suitable for powerline communication HomePlug AV2 is firstly presented. Targeting different input power level, an attenuation-programmable gain amplifier (AT-PGA) and a low-noise amplifier are adopted as the input stage of receiver, respectively, followed by a fourth-order low-pass filter and a PGA with a build-in feedback control to improve linearity and stay constant bandwidth. A line driver with programmability in transmitter is designed to synthesize output impedance for maximizing the power density transmission ratio in power lines characterized by an impedance of 50 &x03A9;. The analog front end is realized in 0.18-&x03BC;m 3.3-V CMOS technology with power consumption of 160 mW (receiver) and 350 mW (transmitter) that occupies a 5.75-mm<sup>2</sup> die area (dual channel). The receiver exhibits a bandwidth of 100 MHz and a gain range from -26.2 to 21 dB, with a minimum noise figure of 20.2 dB at maximum gain 21 dB and maximum IIP3 of 36.1 dBm at minimum gain -26.2 dB. The transmitter achieves 47-dB lowband multi-tone power ratios (MTPR) and 9.6-dB high-band MTPR.
URI: http://localhost/handle/Hannan/206397
volume: 64
issue: 11
More Information: 2858,
2870
Appears in Collections:2017

Files in This Item:
File SizeFormat 
7938719.pdf2.38 MBAdobe PDF
Title: A Compact High-Performance Programmable-Gain Analog Front End for HomePlug AV2 Communication in 0.18- \mu \text{m} CMOS
Authors: Zhangming Zhu;Jingyu Wang
Year: 2017
Publisher: IEEE
Abstract: An analog front end suitable for powerline communication HomePlug AV2 is firstly presented. Targeting different input power level, an attenuation-programmable gain amplifier (AT-PGA) and a low-noise amplifier are adopted as the input stage of receiver, respectively, followed by a fourth-order low-pass filter and a PGA with a build-in feedback control to improve linearity and stay constant bandwidth. A line driver with programmability in transmitter is designed to synthesize output impedance for maximizing the power density transmission ratio in power lines characterized by an impedance of 50 &x03A9;. The analog front end is realized in 0.18-&x03BC;m 3.3-V CMOS technology with power consumption of 160 mW (receiver) and 350 mW (transmitter) that occupies a 5.75-mm<sup>2</sup> die area (dual channel). The receiver exhibits a bandwidth of 100 MHz and a gain range from -26.2 to 21 dB, with a minimum noise figure of 20.2 dB at maximum gain 21 dB and maximum IIP3 of 36.1 dBm at minimum gain -26.2 dB. The transmitter achieves 47-dB lowband multi-tone power ratios (MTPR) and 9.6-dB high-band MTPR.
URI: http://localhost/handle/Hannan/206397
volume: 64
issue: 11
More Information: 2858,
2870
Appears in Collections:2017

Files in This Item:
File SizeFormat 
7938719.pdf2.38 MBAdobe PDF