Please use this identifier to cite or link to this item: http://dlib.scu.ac.ir/handle/Hannan/200601
Authors: Fed. Univ. of Rio de Janeiro, Rio de Janeiro, Brazil;Soares, Carlos Fernando T. ; Petraglia, Antonio
subject: analogue integrated circuits; capacitors; integrated circuit layout; simulated annealing; analog designs; automated method; automatic placement; capacitance matching; fully-integrated capacitors; generalized common centroid layout; spatial correlation optimization; standard simulated annealing framework; symmetrical common centroid placement; Capacitance; Capacitors; Correlation; Layout; Nickel; Optimization; Symmetric matrices; CMOS integrated circuits; Capacitors; design automation; layout; simulated annealing; switched capacitor circuits;
Year: 2015
Publisher: ieee
URI: http://localhost/handle/Hannan/200601
ISSN: 0278-0070
volume: 34
issue: 10
More Information: 1691
1695
Appears in Collections:2015

Files in This Item:
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Authors: Fed. Univ. of Rio de Janeiro, Rio de Janeiro, Brazil;Soares, Carlos Fernando T. ; Petraglia, Antonio
subject: analogue integrated circuits; capacitors; integrated circuit layout; simulated annealing; analog designs; automated method; automatic placement; capacitance matching; fully-integrated capacitors; generalized common centroid layout; spatial correlation optimization; standard simulated annealing framework; symmetrical common centroid placement; Capacitance; Capacitors; Correlation; Layout; Nickel; Optimization; Symmetric matrices; CMOS integrated circuits; Capacitors; design automation; layout; simulated annealing; switched capacitor circuits;
Year: 2015
Publisher: ieee
URI: http://localhost/handle/Hannan/200601
ISSN: 0278-0070
volume: 34
issue: 10
More Information: 1691
1695
Appears in Collections:2015

Files in This Item:
File Description SizeFormat 
7079383.pdf474.05 kBAdobe PDFThumbnail
Preview File
Authors: Fed. Univ. of Rio de Janeiro, Rio de Janeiro, Brazil;Soares, Carlos Fernando T. ; Petraglia, Antonio
subject: analogue integrated circuits; capacitors; integrated circuit layout; simulated annealing; analog designs; automated method; automatic placement; capacitance matching; fully-integrated capacitors; generalized common centroid layout; spatial correlation optimization; standard simulated annealing framework; symmetrical common centroid placement; Capacitance; Capacitors; Correlation; Layout; Nickel; Optimization; Symmetric matrices; CMOS integrated circuits; Capacitors; design automation; layout; simulated annealing; switched capacitor circuits;
Year: 2015
Publisher: ieee
URI: http://localhost/handle/Hannan/200601
ISSN: 0278-0070
volume: 34
issue: 10
More Information: 1691
1695
Appears in Collections:2015

Files in This Item:
File Description SizeFormat 
7079383.pdf474.05 kBAdobe PDFThumbnail
Preview File