Please use this identifier to cite or link to this item: http://localhost/handle/Hannan/142248
Title: A 30-W 90&x0025; Efficiency Dual-Mode Controlled DC&x2013;DC Controller With Power Over Ethernet Interface for Power Device
Authors: Yongyuan Li;Zhangming Zhu
Year: 2017
Publisher: IEEE
Abstract: A dual-mode controlled dc&x2013;dc controller with power over Ethernet (PoE) interface for power device (PD) is presented that is designed to support drawing power either from an Ethernet cable or from an external auxiliary supply support (ASS). PoE interface supports all the functions that comply with the IEEE802.3af/at standard. Based on bandgap reference structure, a detection comparator is provided to detect input voltage without extra voltage reference. Using a low offset voltage amplifier, a low-loss current-limiting technique is proposed to achieve a high-precision current-limit point. Based on a high-speed comparator and two timing capacitors, an oscillator (OSC) is implemented for better accuracy, and provides the maximum duty cycle (<inline-formula> <tex-math notation="LaTeX">D_{\mathrm {max}} </tex-math></inline-formula>) and external frequency synchronization. The chip is fabricated in a 0.5-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> 65 V BCD process and occupies a die size (with pads) of <inline-formula> <tex-math notation="LaTeX">1.79 \times 2.76 </tex-math></inline-formula> mm<sup>2</sup>. The experimental results are measured for an active clamp forward converter with a wide range of dc input voltages from 33 to 57 V, an output voltage of 12 V, and an output power of 30 W. The chip achieves peak power efficiency of 90&x0025; and 90.63&x0025; on DC and ASS, respectively. The load regulation at different input voltages can be measured to be within &x00B1;0.11&x0025;. Measurements further show that the peak-to-peak ripple voltage of the chip is 161 mV and the recovery time is less than 1.2 ms for the 2-A load step.
URI: http://localhost/handle/Hannan/142248
volume: 25
issue: 6
More Information: 1943,
1953
Appears in Collections:2017

Files in This Item:
File SizeFormat 
7862281.pdf3.48 MBAdobe PDF
Title: A 30-W 90&x0025; Efficiency Dual-Mode Controlled DC&x2013;DC Controller With Power Over Ethernet Interface for Power Device
Authors: Yongyuan Li;Zhangming Zhu
Year: 2017
Publisher: IEEE
Abstract: A dual-mode controlled dc&x2013;dc controller with power over Ethernet (PoE) interface for power device (PD) is presented that is designed to support drawing power either from an Ethernet cable or from an external auxiliary supply support (ASS). PoE interface supports all the functions that comply with the IEEE802.3af/at standard. Based on bandgap reference structure, a detection comparator is provided to detect input voltage without extra voltage reference. Using a low offset voltage amplifier, a low-loss current-limiting technique is proposed to achieve a high-precision current-limit point. Based on a high-speed comparator and two timing capacitors, an oscillator (OSC) is implemented for better accuracy, and provides the maximum duty cycle (<inline-formula> <tex-math notation="LaTeX">D_{\mathrm {max}} </tex-math></inline-formula>) and external frequency synchronization. The chip is fabricated in a 0.5-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> 65 V BCD process and occupies a die size (with pads) of <inline-formula> <tex-math notation="LaTeX">1.79 \times 2.76 </tex-math></inline-formula> mm<sup>2</sup>. The experimental results are measured for an active clamp forward converter with a wide range of dc input voltages from 33 to 57 V, an output voltage of 12 V, and an output power of 30 W. The chip achieves peak power efficiency of 90&x0025; and 90.63&x0025; on DC and ASS, respectively. The load regulation at different input voltages can be measured to be within &x00B1;0.11&x0025;. Measurements further show that the peak-to-peak ripple voltage of the chip is 161 mV and the recovery time is less than 1.2 ms for the 2-A load step.
URI: http://localhost/handle/Hannan/142248
volume: 25
issue: 6
More Information: 1943,
1953
Appears in Collections:2017

Files in This Item:
File SizeFormat 
7862281.pdf3.48 MBAdobe PDF
Title: A 30-W 90&x0025; Efficiency Dual-Mode Controlled DC&x2013;DC Controller With Power Over Ethernet Interface for Power Device
Authors: Yongyuan Li;Zhangming Zhu
Year: 2017
Publisher: IEEE
Abstract: A dual-mode controlled dc&x2013;dc controller with power over Ethernet (PoE) interface for power device (PD) is presented that is designed to support drawing power either from an Ethernet cable or from an external auxiliary supply support (ASS). PoE interface supports all the functions that comply with the IEEE802.3af/at standard. Based on bandgap reference structure, a detection comparator is provided to detect input voltage without extra voltage reference. Using a low offset voltage amplifier, a low-loss current-limiting technique is proposed to achieve a high-precision current-limit point. Based on a high-speed comparator and two timing capacitors, an oscillator (OSC) is implemented for better accuracy, and provides the maximum duty cycle (<inline-formula> <tex-math notation="LaTeX">D_{\mathrm {max}} </tex-math></inline-formula>) and external frequency synchronization. The chip is fabricated in a 0.5-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> 65 V BCD process and occupies a die size (with pads) of <inline-formula> <tex-math notation="LaTeX">1.79 \times 2.76 </tex-math></inline-formula> mm<sup>2</sup>. The experimental results are measured for an active clamp forward converter with a wide range of dc input voltages from 33 to 57 V, an output voltage of 12 V, and an output power of 30 W. The chip achieves peak power efficiency of 90&x0025; and 90.63&x0025; on DC and ASS, respectively. The load regulation at different input voltages can be measured to be within &x00B1;0.11&x0025;. Measurements further show that the peak-to-peak ripple voltage of the chip is 161 mV and the recovery time is less than 1.2 ms for the 2-A load step.
URI: http://localhost/handle/Hannan/142248
volume: 25
issue: 6
More Information: 1943,
1953
Appears in Collections:2017

Files in This Item:
File SizeFormat 
7862281.pdf3.48 MBAdobe PDF